Machine and Assembly Language

Lectures2, 3 - Machine Language

(In the slides notes)

Computer Programs

We will use 32-bit MIPS.

CPU

CPU with Memory ^cb30a4

More on Registers

Registers

How MIPS Works?

  • Code is data: stored in RAM
  • MIPS takes instructions from RAM and attempts to execfute them.
  • Problem: We only know from context what bits have what meaning which are instructions.
  • SOLUTION: Convention set memory address 0 in RAM to be an instruction.
  • Problem: How does MIPS know what to do next?
  • SOLUTION: Have a special register called Program Counter
  • Problem: How do we put our program into RAM?
  • SOLUTION: A program called a loader puts our program into Memory and sets the Program Counter to be the first address.

MIPS Language

Example: Write a program in MIPS that adds values of registers 9 and stores the result in register $3.

add $d, $s, $t
0000 00ss ssst tttt dddd d000 0010 000

Adds registes t and stores the sm in registers $d.

Important: The order of s and $t are shifter in the encoding.

Solution:

add $3, $8, $9:
 0000 0001 0000 1001 00011 1000 0010 0000
Putting Values In Registers
.word i: iiii iiii iiii iiii iiii iiii iiii iiii

Example: Write MIPS program that adds together 11 and 13 and stores the result in register $3.

lis $8 
.word 11
lis $9
.word 0xd
add $3, $8, $9

INCOMPLETE

How to return control back to the loader?

jr $s
0000 00ss sss0 0000 0000 0000 0000 1000

Jump Register: sets the Program Counter to the address to be in $s.

For us, our return address will typically be in $31, so we will call

jr $31
0000 0011 1110 0000 0000 0000 0000 1000

This command return control to the loader.

FINAL VERSION:

lis $8 
.word 11
lis $9
.word 0xd
add $3, $8, $9
jr $31

What is the Fetch-Execute Cycle? 1. Load into start of memory. Set up Program Counter to start of memory. 0. 2. Fetch: IR fetches hard from RAM based on PC 1. PC, PC+1, PC+2, PC+3 3. Increment: PC += 4 (already at next instruction position) 4. Execute: take IR instructions → CU will decode what to do.